diff --git a/.gitignore b/.gitignore
index 7de22d7..a427442 100644
--- a/.gitignore
+++ b/.gitignore
@@ -309,3 +309,4 @@ dist
 # Stores VSCode versions used for testing VSCode extensions
 .vscode-test
 
+citations
diff --git a/README.md b/README.md
index 2f9a424..f552e9c 100644
--- a/README.md
+++ b/README.md
@@ -1,2 +1,33 @@
-# DigitalCalibration
+# 针对adc的片上数字校准系统研究
 
+
+
+## target
+
+
+
+### citations
+
+[1]丁洋, 王宗民. 一种基于统计的流水线ADC数字后台校准方法[J]. 微电子学与计算机, 2011, 28(2):5.
+
+[1]郭静宜, 李冬梅, 刘力源,等. 一种适用于流水线ADC的数字校准算法的硬件实现[J]. 高技术通讯, 2009(03):290-294.
+
+[1]吴俊杰, 朱从益, 刘海涛. 一种应用于流水线ADC数字校准算法及实现[J]. 现代雷达, 2014, 36(9):44-48.
+
+[1]戴澜, 周玉梅, 胡晓宇,等. 一种流水线ADC数字校准算法实现[J]. 半导体学报：英文版, 2008, 29(5):5.
+
+[1]张文莲. 折叠内插ADC中数字校准电路设计[J]. 电子制作, 2020(13):4.
+
+[1]杨一波. 时分交替ADC系统数字校准算法与FPGA实现[D]. 电子科技大学.
+
+[1] Fukazawa M ,  Oshima T ,  Fujiwara M , et al. A CT 2-2 MASH Δ Σ ADC With Multi-Rate LMS-Based Background Calibration and Input-Insensitive Quantization-Error Extraction[J]. IEEE Journal of Solid-State Circuits, 2021, PP(99):1-1.
+
+[1]Moon, Un-Ko, Bang-Sup, et al. Background digital calibration techniques for pipelined ADC's.[J]. IEEE Transactions on Circuits & Systems Part II: Analog & Digital Signal Processing, 1997, 44(2):102-102.
+
+[1] Wei L ,  Tao W ,  Temes G C . Digital foreground calibration methods for SAR ADCs[C]// IEEE. IEEE, 2012.
+
+[1]Grace,  C. R , Hurst, et al. A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration[J]. Solid-State Circuits, IEEE Journal of, 2005, 40(5):1038-1046.
+
+[1] Lee Z M ,  Wang C Y ,  Wu J T . A CMOS 15-bit 125-MS/s Time-Interleaved ADC With Digital Background Calibration[J]. IEEE Journal of Solid-State Circuits, 2007, 42(10):2149-2160.
+
+[1] Shu Y S . Background digital calibration techniques for high-speed, high resolution analog-to-digital data converters[J]. Dissertations & Theses, 2008.
diff --git a/citations.bib b/citations.bib
new file mode 100644
index 0000000..c3462eb
--- /dev/null
+++ b/citations.bib
@@ -0,0 +1,119 @@
+@article{丁洋2011一种基于统计的流水线,
+  title={一种基于统计的流水线ADC数字后台校准方法},
+  author={丁洋 and 王宗民},
+  journal={微电子学与计算机},
+  volume={28},
+  number={2},
+  pages={5},
+  year={2011},
+}
+
+
+@article{郭静宜2009一种适用于流水线,
+  title={一种适用于流水线ADC的数字校准算法的硬件实现},
+  author={郭静宜 and 李冬梅 and 刘力源 and 李福乐},
+  journal={高技术通讯},
+  number={03},
+  pages={290-294},
+  year={2009},
+}
+
+@article{吴俊杰2014一种应用于流水线,
+  title={一种应用于流水线ADC数字校准算法及实现},
+  author={吴俊杰 and 朱从益 and 刘海涛},
+  journal={现代雷达},
+  volume={36},
+  number={9},
+  pages={44-48},
+  year={2014},
+}
+
+@article{戴澜2008一种流水线,
+  title={一种流水线ADC数字校准算法实现},
+  author={戴澜 and 周玉梅 and 胡晓宇 and 蒋见花},
+  journal={半导体学报：英文版},
+  volume={29},
+  number={5},
+  pages={5},
+  year={2008},
+}
+
+@article{张文莲2020折叠内插,
+  title={折叠内插ADC中数字校准电路设计},
+  author={张文莲},
+  journal={电子制作},
+  number={13},
+  pages={4},
+  year={2020},
+}
+
+@phdthesis{杨一波0时分交替,
+  title={时分交替ADC系统数字校准算法与FPGA实现},
+  author={杨一波},
+  school={电子科技大学},
+}
+
+@article{2021A,
+  title={A CT 2-2 MASH Δ Σ ADC With Multi-Rate LMS-Based Background Calibration and Input-Insensitive Quantization-Error Extraction},
+  author={ Fukazawa, M.  and  Oshima, T.  and  Fujiwara, M.  and  Tateyama, K.  and  Matsui, T. },
+  journal={IEEE Journal of Solid-State Circuits},
+  volume={PP},
+  number={99},
+  pages={1-1},
+  year={2021},
+}
+
+@article{Moon1997Background,
+  title={Background digital calibration techniques for pipelined ADC's.},
+  author={Moon and Un-Ko and Bang-Sup and Song},
+  journal={IEEE Transactions on Circuits & Systems Part II: Analog & Digital Signal Processing},
+  volume={44},
+  number={2},
+  pages={102-102},
+  year={1997},
+}
+
+@inproceedings{2012Digital,
+  title={Digital foreground calibration methods for SAR ADCs},
+  author={ Wei, L.  and  Tao, W.  and  Temes, G. C. },
+  booktitle={IEEE},
+  year={2012},
+}
+
+@article{Grace2005A,
+  title={A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration},
+  author={Grace and  C., R.  and Hurst and  P., J.  and Lewis and  S., H. },
+  journal={Solid-State Circuits, IEEE Journal of},
+  volume={40},
+  number={5},
+  pages={1038-1046},
+  year={2005},
+}
+
+
+
+
+
+
+@MISC{_backgrounddi3gital,
+    author = {},
+    title = {Background Digital Calibration Techniques for Pipelined ADC’s},
+    year = {}
+}
+
+@article{2007A,
+  title={A CMOS 15-bit 125-MS/s Time-Interleaved ADC With Digital Background Calibration},
+  author={ Lee, Z. M.  and  Wang, C. Y.  and  Wu, J. T. },
+  journal={IEEE Journal of Solid-State Circuits},
+  volume={42},
+  number={10},
+  pages={2149-2160},
+  year={2007},
+}
+@article{2008Background,
+  title={Background digital calibration techniques for high-speed, high resolution analog-to-digital data converters},
+  author={ Shu, Yun Shiang },
+  journal={Dissertations & Theses},
+  year={2008},
+}
+